Sr Principal Design Engineer

Posted:
9/13/2024, 7:48:48 AM

Location(s):
Austin, Texas, United States ⋅ Texas, United States

Experience Level(s):
Senior

Field(s):
Software Engineering

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

This is an opportunity to join a development team designing state-of-the-art DDR memory controllers to be used in a wide range of applications including Datacenter, Edge computing, Automotive, and AI.  Cadence is a leading provider of IP solutions for the biggest names in the technology industry.  As a member of our team you will have the following responsibilities:

  • Architect solutions for the latest DDR controller features and customer requirements
  • Design RTL in a highly configurable and automated environment
  • Work in small project teams
  • Work across disciplines with Design Verification, Support, Delivery, Application Engineers, PHY design team, etc.
  • Utilize Cadence’s Design Automation flow and IP development tools.
  • Develop high speed circuits and low power features.
  • Improve quality and efficiency and help refine development process for greater productivity of the team through automation and improved methods.
  • Participate in an engineering team to advance our product.

Required Experience & Qualifications

  • BSEE or MSEE and minimum of 5 years of experience required.
  • Background in RTL design including Verilog, synthesis, lint, formal.
  • Strong communication skills
  • Scripting language experience a plus

We’re doing work that matters. Help us solve what others can’t.

Cadence Design Systems

Website: https://www.cadence.com/

Headquarter Location: San Jose, California, United States

Employee Count: 5001-10000

Year Founded: 1988

IPO Status: Public

Industries: Aerospace ⋅ Electronic Design Automation (EDA) ⋅ Hardware ⋅ Mobile ⋅ Semiconductor ⋅ Software