Posted:
8/3/2025, 4:54:23 PM
Location(s):
Karnataka, India ⋅ Bengaluru, Karnataka, India
Experience Level(s):
Mid Level ⋅ Senior
Field(s):
IT & Security
Workplace Type:
On-site
About our Group: Intel NEX team delivers best-in-class Ethernet products and is at the heart of Intel's transformation from a PC company to a company that powers the cloud and billions of smart, connected computing devices. NEX's compelling Ethernet products move the world's data and are the foundations of cloud service and telecommunications data centers. We are a team of problem solvers, experimenters, and innovators who are dedicated to designing the network technologies that currently lead and continue to transform datacenter ecosystems. As a world-class organization, we're looking for outstanding talent to accelerate our growth during an exciting time in Ethernet networking marketing technology. If you're ready to be a part of this journey, then we want to hear from you
We are seeking highly motivated, energetic, team-oriented engineer with 4-8 years of relevant experience, willing to take the challenge of delivering IP, Subsystem and SoC Pre-Silicon verification of the latest set of cutting-edge products in Ethernet Product Group in Intel.
In this position, you will participate and lead the verification of IP, Sub-systems and SoC. You will focus on executing pre-Silicon validation plans as per the IP/product release schedule and deliverables, and carry out debug, report failures, report potential failures and help with root-causing the failures. You will be required to create/review verification test plans, drive/participate in discussions across various disciplines to get a clear understanding of requirements, develop the architecture and design of the verification environment in UVM for pre-silicon RTL verification, develops/run/debug tests in System Verilog, mentor's other engineers in using the verification infrastructure and creating test benches. You may work on verification of block/ss/SoC level testing, participate in functional coverage, code coverage reviews and implement feedback. You should also be able to support post-silicon/platform failures related to the IP provided. You should be able to achieve goals in timely fashion, bring out pointers to management on issues and roadblocks on a timely basis and be able to work with teams across different geographies.
Minimum Qualifications: B. Tech/M.Tech in Electrical, Electronics/CS streams.
Relevant Experience: 3 to 8 Years.
Preferred skillset: High Proficiency in UVM-ability to architect complex testbenches, verification infrastructure, debugging and issue resolution. AXI, AHB, APB, ACE, AXI Stream protocol knowledge Fundamentals of A-profile Cores, AND/OR Networking Protocols such as PCIe, Ethernet, RDMA, NVME or Experience on Networking flows, AND/OR experience in DDR will be extremely preferred
Work Model for this Role
This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.Website: https://www.intel.com/
Headquarter Location: Santa Clara, California, United States
Employee Count: 10001+
Year Founded: 1968
IPO Status: Public
Last Funding Type: Post-IPO Equity
Industries: Artificial Intelligence (AI) ⋅ Information Technology ⋅ Product Design ⋅ Semiconductor ⋅ Software