Multi-Chiplet Fabric Performance Engineer

Posted:
9/17/2024, 12:51:17 AM

Location(s):
Austin, Texas, United States ⋅ Fort Collins, Colorado, United States ⋅ Colorado, United States ⋅ Oregon, United States ⋅ California, United States ⋅ Texas, United States ⋅ Portland, Oregon, United States ⋅ Santa Clara, California, United States

Experience Level(s):
Junior ⋅ Mid Level

Field(s):
Software Engineering

Workplace Type:
Hybrid

Join a cutting-edge and well-funded hardware startup in Silicon Valley as a Multi-chiplet fabric performance engineer within the Data Parallel Accelerator team. Our mission is to reimagine silicon and create Risc-V based Accelerated computing platforms that will transform the industry. Use of chiplets is key to maximize compute on each socket and cross-chiplet fabric play a critical role in ensuring that each compute element has a low latency and high bandwidth path to system memory. You will have the opportunity to work with some of the most talented and passionate engineers in the world to create designs that push the envelope on performance, energy efficiency and scalability. We offer a fun, creative and flexible work environment, with a shared vision to build products to change the world.

Education and Experience

Bachelor’s degree plus 2 years of relevant industry experience.

Master's or Ph.D with internship experience.

Rivos

Website: https://www.rivosinc.com/

Headquarter Location: Mountain View, California, United States

Employee Count: 251-500

Year Founded: 2021

IPO Status: Private

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