Posted:
12/13/2025, 10:11:29 PM
Location(s):
Haifa District, Israel ⋅ Haifa, Haifa District, Israel
Experience Level(s):
Junior ⋅ Mid Level
Field(s):
Software Engineering
Workplace Type:
Hybrid
Be part of Intel’s AI Group and help shape the silicon behind Intel’s most advanced AI platforms.
As a Silicon Validation Engineer, you will be part of a team validating the latest, cutting-edge PCIE, HBM, and die-to-die (UCIe) technologies from first power-on through production. You will work on complex, multi-die AI SoCs and collaborate closely with architecture, design, firmware, and platform teams to ensure robust, high-quality silicon.
Key Responsibilities:
Be part of validation process for PCIe, HBM, and D2D (UCIe) functionality, performance, and reliability on AI accelerators and SoCs.
Execute pre-silicon and post-silicon validation, including bring-up, characterization, and system-level debug.
Debug complex issues across protocol, firmware, electrical, and platform layers; drive root-cause analysis and resolution.
Develop and execute validation tests and automation using C/C++ in Linux-based environments.
Use validation and debug tools such as protocol analyzers, exercisers, and oscilloscopes.
Collaborate with cross-functional teams to support silicon milestones and production readiness.
Preferred Qualifications
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.Website: https://www.intel.com/
Headquarter Location: Santa Clara, California, United States
Employee Count: 10001+
Year Founded: 1968
IPO Status: Public
Last Funding Type: Post-IPO Equity
Industries: Artificial Intelligence (AI) ⋅ Information Technology ⋅ Product Design ⋅ Semiconductor ⋅ Software