Lab Overview:

The Samsung SOC Lab vision provides innovative SoC architecture, bus / memory subsystem, multimedia subsystems and key IP blocks for future Samsung Galaxy products (Smartphones, tablets and future devices). We are defining the high performance SoC architecture development for various Galaxy device lineups. This lab collaborates with Samsung's strategic SoC partners, Samsung MX headquarter team, and key R&D teams around the globe to innovate and reinvent technology that will positively impact millions of people around the world via the Galaxy flagship products.

Position Summary:

We are looking for an intern to help build models for analysis of new SoC architectures and features for next generation mobile products. An architecture foundation and SoC modelling experience is desired for this intern.

Position Responsibilities:

• Perform performance modeling and analysis of hardware features, applications, benchmarks, and uses cases.
• Analyze system-level architectural trade-offs (across mapping of workload to CPU, GPU, NPU, ISP, memory subsystems, and system software). Right size IPs within PPA constraint.
• Develop SoC performance models to help evaluate PPA (power, performance, area) targets including CPU, GPU, ISP, NPU – particularly around mobile platforms.
• Leverage Industry standard tools and/or create in house tools to speed up performance evaluation and analysis.
• Work across the organization to analyze workload and decompose, map workload components to IPs to optimize system performance, energy.
• Working with teams [Application, OS, Driver] to identify, analyze and optimize critical use cases including immersive, camera, AI, Display, Multimedia and gaming applications.
• Evaluate architecture proposal performance benefits in collaboration with SoC Architects and communicate the results across related engineering audiences (SW, HW, Architecture, Leadership).

Required Skills:

• Currently pursuing a Masters or PhD in Computer Science/Engineering or equivalent combination of education, training, and experience
• Experience in architecture analysis and performance modeling, ranging from simple analytical models to cycle accurate performance model and correlation
• Experience with industry standard performance and power modelling tools
• Experience modelling SoC architectures and understanding the challenges involved in integrating internal/external IP and analyzing system-level performance and behavior
• Knowledge of ARM CPU, Interconnect and bus protocols and memory subsystem design - including cache subsystems, GPU, NPU, ISP, Media accelerators, Display pipe, Sensor Hub, Audio processing, Power management and Security infrastructure across the SoC. Communication stack [Wi-Fi, Bluetooth, LTE]
• Ability to evaluate architecture proposals, internal and external IP features
• Modelling and simulator development skills and able to code in C, C++, python and similar programming languages