Posted:
3/27/2025, 3:56:39 AM
Location(s):
San José, San Jose Province, Costa Rica ⋅ San Jose Province, Costa Rica
Experience Level(s):
Mid Level ⋅ Senior
Field(s):
Product
Workplace Type:
Hybrid
The successful candidate will be responsible, but not limited to:
Directs and manages the Test Chip engineering team to drive testability and manufacturability of integrated circuits from the component feasibility stage through production ramp.
Defines and sets priorities for the product development team, manages team performance, and plans and provides resources to meet schedules, standards, and cost.
Evaluates and influences product design and supply chain requirements for appropriate manufacturing and quality processes, systems, tools, and procedures for testability and manufacturability.
Leads team efforts in unit cost reductions through test time reduction and content optimization methodologies as well as other efforts to drive continuous improvement in support of operational excellence.
Provides oversight in yield and quality improvement activities through data analysis, debug, root cause, and implementation into production.
Manages team resources for agility, focus, and execution efficiency to deliver outcomes aligned to organization goals.
Communicates manufacturing project status and/or risk to leadership forums. Responsible for enabling teams to execute through clear goal setting, facilitating work, maintaining accountability, applying differentiated performance management, and driving team results.
Drives results by inspiring people, role modeling Intel values, developing the capabilities of others, and ensuring a productive work environment.
Focuses on people management and technical development.
QUALIFICATIONS
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Minimum Qualifications
Bachelor's degree in Electronics, Electrical, Mecatronics Engineering or equivalent studies.
5+ years of experience in an engineering manager position.
Advanced English Level.
Must have permanent unrestricted right to work in Costa Rica.
Preferred Qualifications
5+ Years of experience in the following:
Semiconductors Test development and execution using test content development tools or digital design development tools.
Background and knowledge in digital circuit design and implementation.
Simulation and validation experience with hardware description languages such as Verilog and/or System Verilog.
Product engineering management or test content development management experience.
Evaluation and validation of DFT circuits including concepts such as timing and performance validation, memory testing, scan testing, fuse testing and/or test program development.
Knowledgeable in statistical data analysis using platforms such as JMP.
Silicon debug and characterization of new products including working with platform and system level validation teams to identify and close silicon issues.
Experience in project management, tracking activities, setting priorities, interacting with stakeholders, and ensuring different process execute according to expectations.
Experience developing technical expertise in individual contributors.
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.Website: https://www.intel.com/
Headquarter Location: Santa Clara, California, United States
Employee Count: 10001+
Year Founded: 1968
IPO Status: Public
Last Funding Type: Post-IPO Equity
Industries: Artificial Intelligence (AI) ⋅ Information Technology ⋅ Product Design ⋅ Semiconductor ⋅ Software