Associate Staff CAD Engineer - Physical Verification

Posted:
7/31/2024, 5:00:00 PM

Location(s):
Austin, Texas, United States ⋅ Texas, United States

Experience Level(s):
Expert or higher

Field(s):
Mechanical Engineering

We are Silicon Labs. We are a leader in secure, intelligent wireless technology for a more connected world. Our integrated hardware and software platform, intuitive development tools, unmatched ecosystem and robust support make us the ideal long-term partner in building advanced industrial, commercial, home and life applications. We make it easy for developers to solve complex wireless challenges throughout the product lifecycle and get to market quickly with innovative solutions that transform industries, grow economies and improve lives.  

Meet the Team

As part of central CAD group, CAD PV team develops and supports various PV decks like DRC, antenna, dummy fill, LVS, extraction and code decks like PERC, float, density, cmp from scratch. The team also develops and automates various flows and methodologies to improve verification quality and optimize performance.

Responsibilities

  • Collaborate closely with CAD, ESD, design, layout and foundry teams to obtain requirements for deck development.

  • In charge of developing PERC layout decks from scratch for all process nodes

  • Collaborate with design and layout teams to provide project support regarding any issues related to physical verification decks and flows.

  • Develop custom testcases to validate the quality of rule decks.

  • Code scripts in python to automate and improve QA flows.

  • Perform new tool/feature evaluations and benchmarks.

  • Work closely with external vendors to report and track bugs in the software

Skills You Will Need

  • BSEE or MSEE with 10+ years of related professions experience

  • Proficiency in coding and debugging PERC LDL and topological rule decks

  • Strong knowledge of coding languages like SVRF/TCL or similar languages

  • Experience in coding LVS, Dummy Fill, DRC and extraction rule decks is a plus

  • Experience working with design/layout engineers to debug DRC, LVS and PERC issues.

  • Knowledge of using physical verification tools like Calibre RVE, Calibre DRV, Virtuoso layout editor etc

  • Proficiency in scripting languages like PERL/Python/Shell for developing new flows and automation of QA process.

  • Experience collaborating with different teams for collecting initial specs, deck development and support and leading deck impact analysis meetings

  • Experience in coding LVS, Dummy Fill, DRC and extraction rule decks is a plus

Benefits & Perks

You can look forward to the following benefits:

  • Great medical (Choice of PPO or Consumer Driven Health Plan with HSA), dental and vision plans

  • Highly competitive salary

  • 401k plan with match and Roth plan option

  • Equity rewards (RSUs)

  • Employee Stock Purchase Plan (ESPP)

  • Life/AD&D and disability coverage

  • Flexible spending accounts

  • Adoption assistance

  • Back-Up childcare

  • Additional benefit options (Commuter benefits, Legal benefits, Pet insurance)

  • Flexible PTO schedule

  • 3 paid volunteer days per year

  • Charitable contribution match

  • Tuition reimbursement

  • Free downtown parking

  • Onsite gym

  • Monthly wellness offerings

  • Free snacks

  • Monthly company updates with our CEO

The annualized base pay range for this role is expected to be between $114,428 - $212,510 USD. Actual base pay could vary based on factors including but not limited to experience, geographic location where work will be performed and applicant’s skill set. The base pay is just one component of the total compensation package for employees. Other rewards may include an annual cash bonus, equity package and a comprehensive benefits package.

We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status.