Design Engineer II

Posted:
8/20/2024, 5:00:00 PM

Location(s):
Shanghai, China

Experience Level(s):
Junior ⋅ Mid Level ⋅ Senior

Field(s):
Mechanical Engineering

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Job Description:

· Responsible for the design and development of high speed analog/mixed signal IC circuit blocks from initial concept and specification through final verification and conformance to customer requirements.

· Candidate’s background should demonstrate good problem solving skills, excellent analog aptitude, good communication skills, and ability to work cooperatively in a team environment.

· Must have demonstrated experience in high speed analog circuit and skill of behavioral mixed signal code

· Operational Amplifier; Low jitter PLL; High Speed Clock Distribution; Bias and Bandgap; Voltage Regulators etc

· Candidate should have working knowledge of a set of common high speed Interface standards and their electrical requirements, and a thorough understanding of jitter.

· Position requires proficiency in using CAD tools for circuit simulation, layout, and physical verification (Cadence tool experience, lab test experience, and experience at 65nm and below technologies are a plus).


Position Requirements:

· Master degree, major in Micro-Electronics, Electronic Engineering or equivalent

· Ability to work effectively alone or as well as in a team.

· Essential that the individual demonstrates strong communication, verbal and written

· Requires good communication skills in English.


Desirable Qualifications:

· Knowledge of one of key Analog IC design area:

· High speed comparator; PLL's; Oscillators; Low Noise Design etc

· Solid understanding of IC design technology and process/methodology in IC design solutions

· Familiar with Cadence analog and mixed-signal EDA tools is a plus

· Familiar with Python or Perl is better

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