Sr. Principal Design Engineer

Posted:
9/13/2024, 7:48:52 AM

Location(s):
Austin, Texas, United States ⋅ Texas, United States

Experience Level(s):
Senior

Field(s):
Software Engineering

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Successful applicant will participate in the design and development of a fully configurable and fully featured Network on Chip (NoC) product. Responsibilities include hardware architecture and micro-architecture definition, as well as RTL design to achieve high performance and low power. Familiarity with NoC technology and concepts, AMBA protocols (AXI, AHB, APB) as well as coherency protocols (ACE, CHI) required

We’re doing work that matters. Help us solve what others can’t.

Cadence Design Systems

Website: https://www.cadence.com/

Headquarter Location: San Jose, California, United States

Employee Count: 5001-10000

Year Founded: 1988

IPO Status: Public

Industries: Aerospace ⋅ Electronic Design Automation (EDA) ⋅ Hardware ⋅ Mobile ⋅ Semiconductor ⋅ Software