Senior Principal Software Engineer

Posted:
3/13/2026, 11:07:46 AM

Location(s):
California, United States ⋅ San Jose, California, United States

Experience Level(s):
Expert or higher ⋅ Senior

Field(s):
Software Engineering

Workplace Type:
Hybrid

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Join our R&D team building next‑gen Accelerated Verification IP (AVIP) and Virtual Bridge solutions for high‑performance IO and memory coherence. You’ll architect, implement, and productize PCIe Gen7 and CXL 2.0/3.x features across C++, UVM and virtualized system models that enable hardware, emulation, and hybrid platforms.

What you’ll do

  • Design and enhance PCIe/CXL AVIP (agents, monitors, scoreboards, sequencers, coverage, error injection).
  • Develop Virtual Bridge components that connect virtual platforms/emulators/FW to RTL (traffic modeling, performance, debug).
  • Own feature bring‑up for CXL.io / CXL.cache / CXL.mem, IDE/security, RAS, switching/fabric (CXL 3.x).
  • Deliver compliance and interoperability scenarios; drive customer escalations and cross‑team integration.

What you’ll need

  • BS with a minimum of 10 years of experience OR MS with a minimum of 7 years of experience OR PhD with a minimum of 5 years of experience

  • Experience with PCIe and/or CXL design/verification, deep protocol‑layer knowledge (LTSSM, DLL/TLP, flow control, ordering).
  • Proficiency in Verilog RTL design and debug
  • Experience with emulation/acceleration or hybrid (virtual + RTL) flows; solid debug skills (waveforms, checkers, coverage).

Nice to have

  • PCIe Gen6/CXL 3.x fabric features (multi‑level switching, global fabric attach, pooling).
  • Performance modeling, QoS/traffic shaping; firmware/OS driver bring‑up exposure; compliance tools.

The annual salary range for California is $154,000 to $286,000. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.

We’re doing work that matters. Help us solve what others can’t.

Cadence Design Systems

Website: https://www.cadence.com/

Headquarter Location: San Jose, California, United States

Employee Count: 5001-10000

Year Founded: 1988

IPO Status: Public

Industries: Aerospace ⋅ Electronic Design Automation (EDA) ⋅ Hardware ⋅ Mobile ⋅ Semiconductor ⋅ Software