Physical Design, Sr Principal Application Engineer

Posted:
7/21/2025, 5:00:00 PM

Location(s):
California, United States ⋅ San Jose, California, United States

Experience Level(s):
Expert or higher ⋅ Senior

Field(s):
Software Engineering

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Sr Principal Application Engineering (AE) - a blend of pre-sales, post-sales and design convergence in the netlist-GDS product space focusing on digital implementation and signoff. 

 

As an expert Digital Implementation and Signoff Field Applications Engineering (AE) , you will work side-by-side with our leading-edge customers. With your expertise, you'll help them deploy Cadence’s market-leading technologies in Synthesis, P&R, and Signoff to meet/exceed their PPA targets, achieve faster design closure, and turn design concepts into reality. You will also work directly with the Cadence R&D group to drive the customer requirements and influence the direction of Cadence next-generation products and technologies

 

Primary focus will be for RTL-to-GDS digital implementation platform and signoff products (Genus, Joules, Innovus, Tempus, Quantus, Liberate) as well as industry shaping AI products (Cerebrus AI Studio, Cerebrus, CoPilot).

Job Requirements

Minimum

  • 10+ years of industry Physical Design experience
  • BS degree Computer Science/Engineering, Electrical, Engineering, or related field
  • Strong knowledge in Digital Design Fundamentals, Semiconductor fundamentals, and Static Timing Analysis is required
  • Prior experience with IC digital implementation flows and backend EDA tools including Place and Route, IR Drop, backend design timing and power closure
  • Experience with advanced nodes 10nm and below
  • Experience in scripting languages such as Tcl/Perl/Python is a must
  • Strong customer-facing communication and problem-solving skills
  • Strong personal drive for continuous learning and expanding professional skill sets
  • Strong verbal, written, and customer communication skills

Preferred

  • Prior experience with IC digital implementation flows and font-end EDA tools including Synthesis, DFT, and Logical Equivalence Checking
  • Prior experience with Cadence tools such as Genus, Innovus, Conformal, Tempus, Modus, Voltus or ICC, ICC2, DC or Primetime is highly desired
  • Experience with advanced nodes 5nm and below

The annual salary range for California is $143,500 to $266,500. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.

We’re doing work that matters. Help us solve what others can’t.

Cadence Design Systems

Website: https://www.cadence.com/

Headquarter Location: San Jose, California, United States

Employee Count: 5001-10000

Year Founded: 1988

IPO Status: Public

Industries: Aerospace ⋅ Electronic Design Automation (EDA) ⋅ Hardware ⋅ Mobile ⋅ Semiconductor ⋅ Software