At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Understand Design specification and develop test/coverage plan. Development of constrained random verification environments and verification components. Writing tests/sequences/functional coverage/assertions to meet verification goals.

Required experience

• Good knowledge of SV/UVM.
• Good knwledge of verilog/vhdl/C/C++
• Experience in any scripting language Perl/Python/shell.
• Knowledge of AMBA protocols. (AXI/AHB/APB).
• Hands on experience in writing tests/sequences/functional coverage.
• Good debugging skills.

Desirable skills and experience

• Familiarity with ARM/CPU architectures.
• Good knowledge of some of the protocols like UART, I2C, SPI, JTAG
• Prior experience with Cadence tools and flows is highly desirable

Strong vocabulary, communication, planning, and presentation skills are essential. Ability to work with high quality output and results in a fast paced and dynamic environment. Ability and desire to learn new  methodologies, languages, protocols etc. Must be open to constant personal development and growth to meet the evolving demands of the semiconductor industry. Self-motivated and willing take up additional responsibilities to contribute to team’s success.

We’re doing work that matters. Help us solve what others can’t.