Posted:
2/27/2026, 3:58:14 AM
Location(s):
California, United States ⋅ San Jose, California, United States
Experience Level(s):
Internship
Field(s):
AI & Machine Learning ⋅ Software Engineering
AI & Chip Design Intern (Summer 2026)
As an intern, you will join a dynamic team of software developers and research‑minded engineers shaping the future of AI‑accelerated chip design and verification. You will be part of the SVG (System Verification Group), whose charter is to develop state‑of‑the‑art EDA software and hardware platforms used for high‑performance functional verification of advanced integrated circuits.
Our products include industry‑leading simulation (Xcelium), formal (Jasper), hardware acceleration (Palladium), FPGA prototyping (Protium), and embedded software bring‑up environments (Helium). Increasingly, these next‑generation verification systems incorporate AI, automation, and advanced data‑driven workflows - and that’s where you come in!
What You’ll Work On
You will contribute to applied research and engineering projects that sit at the intersection of AI/ML, systems, and chip design. Possible project areas include:
Throughout the internship, you’ll gain essential engineering skills including research exploration, requirements definition, project planning, coding, debugging, testing, and documentation. You will work closely with a dedicated mentor and present your work at the end of the summer. You will also get to interact with customers.
You will also participate in immersive training on Cadence’s core verification technologies and join fun events with other interns.
Requirements
Nice to Have
Website: https://www.cadence.com/
Headquarter Location: San Jose, California, United States
Employee Count: 5001-10000
Year Founded: 1988
IPO Status: Public
Industries: Aerospace ⋅ Electronic Design Automation (EDA) ⋅ Hardware ⋅ Mobile ⋅ Semiconductor ⋅ Software