Principal Engineer, Module Development – CMP

Posted:
8/4/2026, 3:45:33 AM

Location(s):
Oregon, United States ⋅ Hillsboro, Oregon, United States

Experience Level(s):
Expert or higher ⋅ Senior

Field(s):
Mechanical Engineering

Workplace Type:
On-site

Pay:
$211k–$298k/yr

Job Details:

Job Description: 

Manufacturing Development and Customer Engineering (MDCE) is a strategic organization within Intel Foundry Technology Manufacturing focused on improving process capability across Intel's technology portfolio-from initial product qualification through high-volume manufacturing. MDCE's mission is to make technology ramp a competitive advantage for Intel Foundry by enabling robust process development, manufacturing readiness, and continuous improvement across advanced logic technologies.
The MDCE organization is responsible for transferring new technologies into high-volume manufacturing, driving process optimization and continuous improvement, resolving complex yield and manufacturing issues, and partnering closely with technology development, factory, and customer teams to ensure predictable, high-quality silicon delivery. MDCE plays a critical role in enabling Intel's foundry customers and internal product teams by delivering scalable, manufacturable solutions across multiple technology nodes.
Intel is seeking an experienced and highly influential Principal Engineer, Module Development with deep expertise in Chemical Mechanical Planarization (CMP) to provide module ownership, technical leadership, and development direction across Intel's advanced logic technologies. This role is responsible for leading CMP process development, cross-node alignment, and high-volume manufacturing readiness for technologies such as 18A, Intel 3, and Intel 12nm. The successful candidate will drive robust CMP solutions that support product execution and IFS/foundry customer success through collaboration with integration, device, yield, defect metrology, quality, reliability, factory, and supplier teams.
This position requires a strong combination of technical depth, strategic thinking, cross-functional leadership, and execution excellence. The Principal Engineer will serve as a key technical focal point for CMP, helping shape module strategy, resolve complex technical issues, and enable sustainable process performance across development and manufacturing environments.

Responsibilities

  • Lead CMP module development strategy and execution across multiple technology nodes.
  • Own technical direction for CMP process optimization, qualification, and high-volume manufacturing readiness.
  • Drive defect reduction, yield improvement, and process stabilization initiatives.
  • Partner with integration, device, yield, factory, and customer engineering teams to resolve complex technical and manufacturing issues.
  • Develop and implement solutions that align module performance across technology development and manufacturing environments.
  • Lead cross-functional problem-solving efforts related to excursions, variability reduction, and process integration.
  • Evaluate, synthesize, and act on diverse technical inputs to define strategic responses and execution plans.
  • Engage with internal and external stakeholders, including suppliers, to co-develop and optimize CMP processes and consumables.
  • Provide technical leadership in process control, metrology, and module interaction impacts on device performance and yield.
  • Mentor junior engineers and act as a technical focal point for CMP within the module and program.
  • Communicate technical findings, status, and recommendations clearly to leadership and stakeholders.
  • Drive rapid execution while maintaining focus on safety, quality, compliance, and customer objectives.

Required Skills and Experience

  • Experience in Chemical Mechanical Planarization (CMP) process development and optimization
  • Proven experience with CMP equipment and consumables, including at least one major CMP tool platform and associated materials/components.
  • Demonstrated ability to perform structured, data-driven root-cause analysis.
  • Working knowledge of process integration and module interactions, including CMP impacts on device performance and yield.
  • Familiarity with CMP-related process control and metrology.

Preferred Skills and Experience

  • Experience with advanced technology nodes, including sub-10nm logic and Gate All Around (GAA).
  • Demonstrated success delivering customized solutions in technology development and high-volume manufacturing environments.
  • Experience collaborating with equipment and material suppliers to co-develop or tune CMP processes.
  • Cross-functional leadership experience across site teams, yield excursions, defect reduction, and technology ramp efforts.
  • Demonstrated ability to mentor junior engineers or serve as a technical focal point.
  • Strong ownership mindset with ability to drive topics from problem definition through deployment and documentation.
  • Ability to thrive in a fast-paced, ambiguous environment with competing priorities.
  • Previous experience in a semiconductor foundry environment.

Qualifications:

  • Master's degree in Chemical Engineering, Materials Science, Electrical Engineering, Mechanical Engineering, Physics, or a related engineering/science field. PhD preferred
  • 15+ years of relevant experience in semiconductor manufacturing, process development, or technology development.
  • 10+ years of direct experience in Chemical Mechanical Planarization (CMP) process development and optimization, including hands-on process tuning and characterization.

          

Job Type:

Experienced Hire

Shift:

Shift 1 (United States of America)

Primary Location: 

US, Oregon, Hillsboro

Additional Locations:

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

This role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter.

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

 

 

Annual Salary Range for jobs which could be performed in the US: $211,400.00-298,440.00 USD

 

 

The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

 

 

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

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ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

Intel

Website: https://www.intel.com/

Headquarter Location: Santa Clara, California, United States

Employee Count: 10001+

Year Founded: 1968

IPO Status: Public

Last Funding Type: Post-IPO Equity

Industries: Artificial Intelligence (AI) ⋅ Information Technology ⋅ Product Design ⋅ Semiconductor ⋅ Software

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