Posted:
5/19/2026, 5:00:00 PM
Location(s):
Bengaluru, Karnataka, India ⋅ Karnataka, India
Experience Level(s):
Mid Level ⋅ Senior
Field(s):
Mechanical Engineering
Position Summary
About Samsung Semiconductor India Research (SSIR)Role and Responsibilities
· Must have 4 - 8 years of experience in SRAM Layout in advanced CMOS process
· Should be able to perform SRAM Memory layout development and physical verification activities for complex designs as per provided specifications.
· Should have expertise in layout area and routing optimization, design rules, yield and reliability issues.
· Good understanding of layout fundamentals i.e. Electro-migration, Latch-up, coupling, crosstalk, IR-drop, parasitic analysis, matching, shielding, etc.
· Should have adequate knowledge of schematics, interface with circuit designer and CAD team.
· Understanding layout effects on the circuit such as speed, capacitance, power and area etc.,
Skills and Qualifications
Experience – 4 to 8 Years of experience
Qualifications
Disclaimer
Samsung Semiconductor India Research (SSIR), a division of Samsung R&D India - Bangalore Pvt. Ltd is dedicated to employing a diverse workforce and providing Equal Employment Opportunity to all individuals, regardless of their religion, gender, age, marital status, gender identity, status as a protected veteran, genetic information, status as a qualified individual with a disability, or any other characteristic protected by law.
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