Sr. Principal Technologist - Security

Posted:
11/20/2024, 8:10:45 AM

Location(s):
California, United States ⋅ Santa Clara, California, United States

Experience Level(s):
Expert or higher ⋅ Senior

Field(s):
IT & Security ⋅ Software Engineering

Workplace Type:
On-site

Astera Labs is a global leader in purpose-built connectivity solutions that unlock the full potential of AI and cloud infrastructure. Our Intelligent Connectivity Platform integrates PCIe®, CXL®, and Ethernet semiconductor-based solutions and the COSMOS software suite of system management and optimization tools to deliver a software-defined architecture that is both scalable and customizable. Inspired by trusted relationships with hyperscalers and the data center ecosystem, we are an innovation leader delivering products that are flexible and interoperable. Discover how we are transforming modern data-driven applications at www.asteralabs.com. 

Are you passionate about security, software, and chip architecture? We are seeking a creative customer facing Technologist to help facilitate Astera’s development of data center security solutions across our product portfolio. In this role, you will play a pivotal role in driving the security architecture and definition of future products by leveraging your expertise in security architecture, SOC architecture, and hardware-software co-design. You will have the opportunity to directly engage with customers, influence product features and roadmap, and help drive innovation to better solve our customers security challenges in hyperscale data centers

This role is fully in person, in Santa Clara. Some travel may be required.

Basic qualifications 

  • BS in Electrical or computer engineering, MS or PhD preferred.
  • ≥10 years' experience developing security solutions including hardware RoT, secure boot, secure debug, attestation, and encryption
  • Experience working in a customer-facing role with the ability to articulate technical concepts, influence decision-making, and build business cases
  • Ability to dig deeply into technical challenges and use cases
  • Strong understanding of chip design principles, architecture, and FW design
  • Strong understanding of “full stack” security solutions from silicon to VM/TEE integration
  • Strong understanding of SPDM and other security management solutions
  • Excellent communication and interpersonal skills with the ability to collaborate effectively with internal teams and external partners.
  • Demonstrated leadership capabilities with a track record of driving technical initiatives and delivering results in a fast-paced environment.
  • Willingness to travel occasionally for customer meetings and industry events.

Preferred experience 

  • Expertise in PCIe, and CXL security protocols
  • Expertise in link and memory encryption solutions
  • Experience in product integration with BIOS, kernel, OS, tooling, and BMCs
  • Experience with security standards such as FIPS, OCP SAFE, NIST, etc
  • Experience with security audits and secure life cycle
  • Existing engagement and robust network within industry organizations such as OCP, Caliptra, DMTF, etc.
  • Deep experience driving silicon definition based on customer requirements and managing product exploration internally.

We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.

Astera Labs

Website: https://www.asteralabs.com/

Headquarter Location: Santa Clara, California, United States

Employee Count: 101-250

Year Founded: 2017

IPO Status: Private

Last Funding Type: Series D

Industries: Automotive ⋅ Electronics ⋅ Intelligent Systems ⋅ Semiconductor