At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Cadence is looking for an intern to develop algorithms in the physical design space. 

The candidate should have a master’s degree and be pursuing a Ph.D. in algorithms for physical design IC tools. The candidate should have expertise on some set of physical synthesis problems such as placement, routing, clock tree synthesis, buffering, gate sizing, or logic optimization. 

The candidate should be a strong coder and be able to quickly prototype and test algorithms. An established publication record is preferable.The Position Requirements are…Must be currently enrolled in a PhD or 2nd year MS program, with a primary research focus on VLSI CAD algorithm development.

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