Senior Engineer, Design Verification Engineering

Posted:
5/5/2024, 5:00:00 PM

Location(s):
Karnataka, India

Experience Level(s):
Senior

Field(s):
Software Engineering

Analog Devices, Inc. (NASDAQ: ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $12 billion in FY22 and approximately 25,000 people globally working alongside 125,000 global customers, ADI ensures today’s innovators stay Ahead of What’s Possible.

About the Role

Key member of design Emulation team responsible for SOC or subsystem design pre silicon verification.  The candidate will be responsible for formulating Emulation strategies, Define Emulation architecture, Flow, Methodology and leading, driving and completing verification of large integrated products on emulation platform. As a senior team member, it is expected that he/she will lead and influence verification methodologies within both DBU and ADI.   The candidate is also encouraged to participate in cross company technical initiatives as well as patent and publish work where possible.

Responsibilities

  • End to End Emulation ownership of IP or Subsystem or SOC level
  • Define Emulation strategy, architecture, flow and methodology using Palladium  or Protium
  • Work with Design , verification, System FPGA and Software teams on hardware emulation requirements
  • Emulation database creation, Synthesis, test development and verification
  • Work with Engineering Enablement team, tool vendors for emulation flow, tool development
  • Defining testplans, tests and verification methodology for block / subsystem and chip-level emulation. Coverage analysis and coverage improvement
  • End to end System scenario development and validation
  • Performance, bandwidth and latency measurement
  • Come up with verification strategy for a product after going through product requirements and design specifications.

Requirements

  • B.Tech/M.Tech with 5+ years of industry experience in Digital verification and Emulation
  • Expertise in Palladium or Protium Emulators is an added advantage
  • Synthesis and emulation build creation, flow bring up and build release  to other teams
  • Good understanding of SOC/Subsystem design concepts and design architectures.
  • Experience in Verilog, SV-UVM , SOC level testbenches is an added advantage
  • Expertise in Performance , latency, bandwidth analysis and improvement
  • Knowledge of microprocessor cores such as ARM, RISC-V, Tensilica , Neural Network, GPU Cores is a plus.
  • Extensive knowledge in  TCL/Python/shell-scripting
  • Exceptional interpersonal and communication skills, collaborate and influence innovative design development/verification methodologies to wider team spread across the globe.
  • Quick to adopt new technologies with good problem-solving skills.

For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export  licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls.  As such, applicants for this position – except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) – may have to go through an export licensing review process.

Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.

Job Req Type: Experienced

          

Required Travel: Yes, 10% of the time

          

Shift Type: 1st Shift/Days