Principal Product Engineer - IC Verification

Posted:
6/18/2024, 5:00:00 PM

Location(s):
Pudong, Shanghai, China ⋅ Shanghai, China

Experience Level(s):
Senior

Field(s):
Product

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Job Description:

- Work closely with the Sales team to identify and scope opportunities for Cadence SoC Verification solution including simulation, Emulation and Acceleration products
- Aligned closely with corporate engineering and sales/marketing team on customer requirement for product direction/improvement.
- Understanding customer’s design and verification issues and provide Cadence solution
- Convert the customer’s requirements into a product specification
- Work with R&D to drive the specification into a real product; work with validation team to ensure the quality of the software

Requirements:

- 3-6 or above years’ experience is desired
- Design or verification experience in IP or SoC chip level.
- Familiar with System Verilog/VHDL and HDL simulators
- Verification Methodology like UVM is preferred
- Knowledge of Unix and Linux is highly preferred
- Strong verbal and written communication skills in English
- Strong teamwork skills with good human relationship
- Experience in EDA tools such as simulator, emulator or prototype, etc will be a plus
- Familiar with FPGA is a big advantage
- Familiar with typical CPU architecture (MIPS, x86, ARM, or PPC), Device Dirver developing flow, and debugging skills, experience with kernel debugging tools and JTAG, and working experience on board bring-up activities is preferred
 

We’re doing work that matters. Help us solve what others can’t.

Cadence Design Systems

Website: https://www.cadence.com/

Headquarter Location: San Jose, California, United States

Employee Count: 5001-10000

Year Founded: 1988

IPO Status: Public

Industries: Aerospace ⋅ Electronic Design Automation (EDA) ⋅ Hardware ⋅ Mobile ⋅ Semiconductor ⋅ Software