Posted:
6/12/2026, 1:25:01 AM
Location(s):
Austin, Texas, United States ⋅ Oregon, United States ⋅ Hillsboro, Oregon, United States ⋅ California, United States ⋅ Texas, United States ⋅ Folsom, California, United States
Experience Level(s):
Mid Level ⋅ Senior
Field(s):
Mechanical Engineering
Workplace Type:
Hybrid
The Role and Impact
Join Intel in shaping the future of technology. As an EDA Tools Hardware Engineer, you will play a pivotal role in enabling groundbreaking innovations that power Intel's leadership in semiconductor design and manufacturing. We are seeking an experienced EDA CAD / Tool Flow Development Engineer to develop and maintain transistor-level electromigration (EM) and IR drop analysis flows for custom IPs, embedded memories, SRAMs, analog/mixed-signal interfaces, and high-performance custom macros across advanced semiconductor technologies.
This role focuses on CAD methodology, automation infrastructure, power integrity analysis flows, and silicon correlation for transistor-level reliability verification. The engineer will work closely with circuit design, physical design, package, reliability, and signoff teams to enable scalable and accurate EM/IR analysis methodologies for advanced-node designs.
The ideal candidate has strong expertise in transistor-level power integrity analysis, SPICE-based verification, parasitic-aware reliability modeling, and automation development using industry-standard EM/IR signoff tools.
Minimum Qualifications
Bachelor's degree in Computer Engineering, Electrical Engineering, Computer Science, or a related field, and 6+ years of experience; 4+ years of experience with a Master's degree; or 2+ years of experience with a PhD.
EM/IR reliability concepts (Electromigration, and Power Drop)
Experience with Redhawk/Totem tools
Preferred Qualifications
Experience in the following:
CMOS circuit operation
Power delivery networks
SPICE simulation
Parasitic extraction fundamentals
Advanced-node design challenges
Transistor-level power integrity analysis flows
Scripting and automation skills in Linux environments
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.
Annual Salary Range for jobs which could be performed in the US: $141,910.00-269,100.00 USD
The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.*
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.Website: https://www.intel.com/
Headquarter Location: Santa Clara, California, United States
Employee Count: 10001+
Year Founded: 1968
IPO Status: Public
Last Funding Type: Post-IPO Equity
Industries: Artificial Intelligence (AI) ⋅ Information Technology ⋅ Product Design ⋅ Semiconductor ⋅ Software