Introduction
The Wafer Alignment team in the Metrology Measure department develops software that enables chipmakers to position patterns on wafers with extreme precision. Your work as a Computer Science internship: performance optimization student helps us improve the speed and efficiency of these models.

These models are central to the scanner’s performance and must deliver nanometer‑level accuracy. Increasing model complexity brings better precision but also adds resource usage and calculation time. In this internship, you help explore solutions to optimize this balance and support overall system throughput.

Your assignment
You will analyze the current software performance of Wafer Alignment models and explore ways to optimize them. You will also create and test a prototype to validate the selected improvements. Throughout the Computer Science internship: performance optimization, you collaborate closely with engineers from different disciplines.
Your main responsibilities will be:

• Analyze performance bottlenecks in existing Wafer Alignment model implementations.
• Investigate and propose alternatives to improve execution speed and resource efficiency.
• Develop a qualified, well‑structured prototype to evaluate the chosen improvement path.
• Compare prototype performance to the current baseline and document your conclusions.
• Work with team members to align technical decisions.
• Present your findings to the Wafer Alignment team.

This is a bachelor regular internship for a minimum of 6 months, 4-5 days per week (2 days on‑site). The start date of this internship is as September 2026, but earlier is possible.

Your profile
To be suitable for the internship, you:

• Are pursuing a bachelor’s degree in computer science or software engineering.
• Have experience with C++ or C and understand object‑oriented software design.
• Are analytical and able to work in a structured, detail‑oriented way.
• Are collaborative and enjoy working in a multidisciplinary environment.
• Have affinity with algorithms, version control, and software testing practices.

This position requires access to controlled technology, as defined in the United States Export Administration Regulations (15 C.F.R. § 730, et seq.). Qualified candidates must be legally authorized to access such controlled technology prior to beginning work. Business demands may require ASML to proceed with candidates who are immediately eligible to access controlled technology.

Inclusion and diversity

ASML is an Equal Opportunity Employer that values and respects the importance of a diverse and inclusive workforce. It is the policy of the company to recruit, hire, train and promote persons in all job titles without regard to race, color, religion, sex, age, national origin, veteran status, disability, sexual orientation, or gender identity. We recognize that inclusion and diversity is a driving force in the success of our company.

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