At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Position Description:

• To provide key technical support in digital IC design synthesis products.
• To demonstrate strong ability and to be hands-on in synthesis/DFT, and low power methodology.
• To run benchmarks, characterize problems, and support key customer engagements.
• To work with team, customer and R&D on new methodologies and flow refinement.

Position Requirements:

• Master with 3-5 years working experience or Bachelor with 7+ years’ experience in IC design.
• Cadence Genus experience will be a plus.
• Understanding of synthesis/DFT techniques, constraint and timing analysis is required.
• Knowledge of power analysis & optimization will be a plus.
• Experiences in synthesis/LEC/DFT/power analysis tools .
• Advanced node experiences and familiar with APR tools will be a plus.
• Good communication in English and Chinese, good confidence and good self-motivation.
• Be familiar with shell/perl/tcl etc. script language.

We’re doing work that matters. Help us solve what others can’t.