Job Details:

Job Description: 

• Performs functional logic verification of an integrated SoC to ensure design will meet specifications.

• Defines and develops scalable and reusable block, subsystem, and SoC verification plans, test benches, and the verification environment to meet the required level of coverage and confirm to microarchitecture specifications.

• Executes verification plans and defines and runs emulation and system simulation models to verify the design, analyze power and performance, and uncover bugs. Replicates, root causes, and debugs issues in the pre-silicon environment.

• Finds and implements corrective measures to resolve failing tests.

• Collaborates and communicates with SoC architects, micro-architects, full chip architects, RTL developers, post silicon, and physical design teams to improve verification of complex architectural and microarchitectural features.

• Documents test plans and drives technical reviews of plans and proofs with design and architecture teams.

• Incorporates and executes security activities within test plans, including regression and debug tests, to ensure security coverage.

• Maintains and improves existing functional verification infrastructure and methodology.

• Absorbs learning from post silicon on the quality of validation done during pre-silicon development, updates test plan for missing coverages and proliferates to future products.

Qualifications:

Minimum Qualifications:

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or in a related field of study

• 4+ years of working experience in Design Verification

• Developing OVM/UVM verification architectures and methodologies

• Strong programming skills in C/C++, or Perl/TCL or Phyton

• Good communication and strong analytical skills

Preferred Qualifications:

• Graduate degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field of study

• Experience in digital design

• Low power experience (e.g., UPF)

• Experience with USB and/or PCIe protocols

          

Job Type:

Experienced Hire

Shift:

Shift 1 (Malaysia)

Primary Location: 

Malaysia, Penang

Additional Locations:

Business group:

In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel’s products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore’s Law and groundbreaking innovations.  DEG is Intel’s engineering group, supplying silicon to business units as well as other engineering teams.  As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.