Job Details:

Job Description: 

The world is transforming and so is Intel. Here at Intel, we believe the world needs technology that can enrich the lives of every person on Earth.

The E-Core CPU team is a CPU Core development team in Guadalajara, Mexico. We believe that developing these technologies takes a team of exceptionally talented individuals who work together to visualize, innovate, and make the future of computing possible. If you are excited about advanced development of breakthrough technologies for future-generation CPU cores, we welcome you to join us, to do something wonderful.

The focus of this role is to be part of a team of pre-silicon verification engineers to verify new and existing features for Intel's next generation CPU IP resulting in bug free final design. You will be responsible for exhaustively validating the RTL implementation of new architecture and microarchitecture capabilities using a combination of standalone and top-level test environments as well as formal verification.

Role responsibilities include although not limited to:

• Developing pre-Si validation test plans and test scenarios to prove the correctness of the design.
• Development of components for a simulation-based environment: bus functional models, trackers, checkers, scoreboards, and testbenches.
• Performing and debugging digital simulations and driving to closure of bugs.
• Development of functional coverage and achieving coverage goals.
• Working closely with design engineers, micro-architects, and other team members to ensure high quality of test plans, functional coverage, and tests.
• Willing to deliver high-quality output against deadlines and able to work effectively in a cross-site team environment.

Qualifications:

Minimum qualifications, you must possess the below minimum qualifications to be initially considered for this position:

• A bachelor's degree in electrical engineering, Computer Engineering, Computer Science, or related field with:

6+ months of relevant work experience listed below:

• In-depth Computer architecture knowledge.
• Experience with hardware description languages (such as VHDL, Verilog or System Verilog).
• Test bench development with System Verilog UVM/OVM.
• Experience with least one programming/scripting languages such as C/C++, Perl, Ruby, Python, and Unix (Linux).
• Test writing/generation, checker development, coverage analysis, failure debug, root cause analysis.

• Advanced English level.

This position is not eligible for employment-based visa/immigration sponsorship.

This position is for Guadalajara location only. Relocation is not approved.

Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates:

• Master's degree in Electrical Engineering, Computer Engineering, Computer Science.

• Experience with Intel Architecture ISA and System Architecture, x86 assembly language.

Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.

          

A candidate who accepts an offer of employment in Mexico is required to present their own personal identification information and numbers for the following: Mexican Security Number (NSS), Tax Identification Number (RFC) and CURP identification number.

          

Job Type:

College Grad

Shift:

Shift 1 (Mexico)

Primary Location: 

Mexico, Guadalajara

Additional Locations:

Business group:

The Silicon Engineering Group (SIG) is a worldwide organization focused on the development and integration of SOCs, Cores, and critical IPs from architecture to manufacturing readiness that power Intel’s leadership products. This business group leverages an incomparable mix of experts with different backgrounds, cultures, perspectives, and experiences to unleash the most innovative, amazing, and exciting computing experiences.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.