Job Details:

Job Description: 

Defines and drives pre-silicon design quality and reliability verification plans for SoCs, CPUs, GPUs, and IPs. Develops IP, block, subsystem, and SOC quality and reliability verification plans, analysis set points, verification environment, and tools/flows/methodology (TFM) settings needed for pre-silicon reliability verification. Monitors the execution of design quality and reliability verification plans. Partners with design execution owners to replicate, root cause, and debug relevant issues seen in pre-silicon environment. Identifies high risk failure modes early in the design life cycle and collaborates with design and technology development teams to reduce risk. Finds and drives implementation of mitigation steps to resolve violations seen during verification. Collaborates with design execution owners to accurately assess the quality and reliability risks present in complex designs. Documents reliability verification plans and drives technical review of design issues found. Maintains and improves existing quality and reliability verification methodology.

Qualifications:

Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:
- BSc, MSc, DSc in EE, Physics or similar with min of 5 years of experience in VLSI reliability, AMS design, design simulations, design backend, or similar
- Managerial experience
- Excellent project management and communication skills
- Excellent interpersonal skills

Preferred Qualifications:
- Experience and knowledge in the area of VLSI quality and reliability
- Experience and knowledge in design backend verification, timing analysis, RV analysis, layout, ESD and similar

Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.

          

Job Type:

Experienced Hire

Shift:

Shift 1 (Israel)

Primary Location: 

Israel, Haifa

Additional Locations:

Business group:

The Client Engineering group (CEG) is a worldwide organization focused on the development and integration of SOCs, and critical IPs that power Intel's leadership products, driving the Client roadmap for CCG, and invest in future disruptive technologies.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.