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Job Description:

The System Validation group in collaboration with Product Development is responsible for ensuring that end products operate fully in their intended applications. This involves the planning, design, integration, test and documentation of a complete system level platform used to test the prototype Integrated Circuits and FW/SW.

The System Validation Design Engineer works in parallel with the IC and FW/SW designers to design, integrate and validate an entire system solution for PCIe switches. For the "first Silicon", System Validation Design engineers are responsible for entire system design required for SOC functional validation involving board designs, FW coding, FPGA/CPLD code development, tester designs, Tcl/Tk script coding, and software driver/OS system level integration. Using these systems, together with the latest protocol analyzers and test equipment, the System Validation Design Engineer will work as part of a team to develop and execute a Feature Test Plan that fully exercises the prototype IC and associated FW/SW. Working at the system level, the System Validation Design Engineer will be involved with existing and newly drafted standards including PCIe Express.

Responsibilities

As a Data Center Solutions, System Validation Design Engineer, you will be involved in designing, building and debugging system level HW, FW and SW to test leading edge prototype IC's in their intended applications. Design work includes:

• As part of system integration process you will be involved in integration of a prototype IC FW/HW into complete SOC solution. This involves working with prototype boards, IC, FW and SW to bring-up the entire system level solution to life and enable further development and testing.
• You will work as part of a team to develop, execute and document a series of Feature Tests that will fully validate the operation of the prototype SOC as part of the overall system. These feature tests will exercise the various functional blocks of a prototype IC, associated FW/SW and tests the system level circuitry to performance criteria and to industry standards.
• Troubleshoot and resolve complex problems in embedded multi-core SOCs.
• Learn and dynamically apply knowledge on IC HW, FW, SOC, Protocols and Standards to find solutions to emerging problems on a daily basis.
• Designing and VHDL coding for CPLD and FPGA's residing on Validation boards and testers
• FW development for SOC for FW driven test infrastructure.
• Application level Tcl/Tk scripting for automated control of the test infrastructure
• High speed board design using PMC and third party IC's, involving both analog and digital circuitry
• Troubleshoot and resolve complex problems in embedded multi-core SOCs.
• Effectively present technical information to small teams of engineers.

Requirements/Qualifications:

Qualifications

• Bachelor's or Master's Degree in Computer Engineering or Electrical Engineering
• 2-4 years of relevant work experience for Engineer II. Less than 2 years will also be considered for Engineer I
• Experience/Knowledge of C, C++ programming languages (strong Data Structures and Algorithms theory) and scripting Language such as Tcl/Tk
• Thorough knowledge of circuit theory and high speed signal fundamentals
• Strong knowledge of Data Communication and Digital Design theory.
• Principles of uProcessor architecture
• Strong problem solving skills, communications and interpersonal skills are required
• Ability to quickly learn new technologies and standards
• Excellent analytical skills
• Lab environment experience and test equipment application.

Desirable qualifications:

• Experience in the PCIe protocol
• IC HW validation experience
• Complex End to End System Level Test execution
• Previous experience developing SOC FW code in C/C++ on a MIPS architecture
• Knowledge of I2C, SPI, SMBus, MCTP standards
• Data Storage Systems -- design/testing
• Hardware experience in high speed digital design and analog circuitry,
• Knowledge of FPGA's and VHDL/verilog coding

Travel Time:

0% - 25%

Pay Range:

We offer a total compensation package that ranks among the best in the industry. It consists of competitive base pay, restricted stock units, and quarterly bonus payments. In addition to these components, our package includes health benefits that begin day one, retirement savings plans, and an industry leading IESPP program with a 6-month look back feature. Find more information about all our benefits at the link below:

Benefits of working at Microchip

The annual base salary range for this position is $76,000-$114,000.*

To all recruitment agencies: Microchip Technology Inc. does not accept unsolicited agency resumes. Please do not forward resumes to our recruiting team or other Microchip employees. Microchip is not responsible for any fees related to unsolicited resumes.