Our Team

Semtech's Signal Integrity Products (SIP) Business Unit delivers high-performance mixed-signal ICs for data communications and video broadcast industries. Our packaging team plays a critical role in the full IC development lifecycle, working across a highly integrated group of digital, analog, and physical designers, as well as manufacturing, quality, and operations teams worldwide. By joining Semtech, you will contribute to the development and delivery of advanced semiconductor packages that protect and interconnect cutting-edge integrated circuits.

Job Summary

Packaging engineers are responsible for designing the case — also known as the "package" — that encapsulates a semiconductor integrated circuit (IC), protecting it against external factors and providing adequate interconnect points to printed circuit boards. This discipline draws on multiple engineering skills including manufacturing, electrical, mechanical, thermal, and reliability engineering. This position targets individuals with electrical engineering expertise and foundational knowledge of component engineering principles, who will contribute to prototype development, qualification activities, and engineering sample delivery across Semtech's global supplier network.

Responsibilities

• Manufacturing engineering oversight across multiple worldwide suppliers, covering early prototype product, qualification vehicles, and early engineering samples
• Serve as technical contact point between engineering, operations, and quality teams
• Prepare engineering documentation and customized assembly instructions
• Select and manage raw material inventory
• Establish priorities and track requirements in a highly dynamic environment
• Track quality deviations and drive disposition and resolution

Minimum Qualifications

• Bachelor's degree in Mechanical or Industrial Engineering, or 5+ years of experience in a relevant electronic manufacturing environment.
• Demonstrated experience or strong aptitude with manufacturing systems such as SAP and Agile.
• Experience with the following packaging technologies: WLCSP, RDL, flip-chip Ball Grid Array (BGA), System in Package (SiP), high-density substrate, and PCB design.
• Experience with EDA design tools such as Cadence Advanced Package Designer v16.6, Artwork Qckvu v3.51, Asitic, and DraftSight is beneficial.
• Understanding of design implications related to JEDEC specification JESD47H (Stress-Test-Driven Qualification of Integrated Circuits) is a definite advantage.
• Strong analytical and problem-solving skills with excellent attention to detail.
• Effective verbal and written communication skills; ability to work cross-functionally in a global team environment.

Desired Qualifications

• Master's degree in Mechanical, Electrical, or Industrial Engineering preferred.
• Prior experience in a semiconductor packaging or assembly environment.

The intent of this job description is to describe the major duties and responsibilities performed by incumbents of this job. Incumbents may be required to perform job-related tasks other than those specifically included in this description. 

All duties and responsibilities are essential job functions and requirements and are subject to possible modification to reasonably accommodate individuals with disabilities.

We are proud to be an EEO employer M/F/D/V. We maintain a drug-free workplace.

We may leverage Artificial Intelligence (AI) tools to enhance efficiency during candidate screening, assessment, and recruitment. Final hiring decisions remain with our Hiring Teams, not AI systems.

A reasonable estimate of the pay range for this position is $70,000 - $75,000.  There are several factors taken into consideration in determining base salary, including but not limited to: job-related qualifications, skills, education and experience, as well as job location and the value of other elements of an employee’s total compensation package.