Job Details:

Job Description: 

Design Enablement team at India, is part of Intel Foundry, having charter to develop methodology for advance process nodes, providing opportunity, to be among the first one to work on latest technology. This role, will provide opportunity to work on Physical design, using Synthesis -Automatic Placement and Route flow, from RTL to GDS, including sign off for Timing, Reliability and Layout verification, using Industry standard tools for complex APR partitions with high frequency targets. Candidate will be working on wide variety of activities related to Synthesis, Floor planning, Placement, Clock Tree Synthesis, Routing, Timing convergence, Scan, Hard Macro integration, and Physical convergence. They will work on constraint development, flow optimization to meet design requirements, by working with RTL developers, CAD team and EDA vendors, to optimize design to improve product level parameters such as power, frequency, and area. This role requires good understanding of devices, digital circuits and timing concepts.

Qualifications:

Candidate must have Master's degree (M.Tech/MS) in Microelectronics/ Electronics Engineering or equivalent qualification from reputed institute. Candidate should have good knowledge of VLSI, Digital electronics and understanding of semiconductor devices, digital circuits, timing closure of design. Understanding of fabrication and process technology will be added advantage. Candidate should have good analytical, problem-solving skill for debugging issues faced at work and should have proactive and transparent communication. They should be having mindset to work in diverse and collaborative environment with teams in different domains and Geos. Any scripting language experience, like perl, TCL, python would be plus point.

          

Job Type:

College Grad

Shift:

Shift 1 (India)

Primary Location: 

India, Bangalore

Additional Locations:

Business group:

As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support.  Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

Legal Disclaimer:

It has come to our notice that some people have received fake job interview letters ostensibly issued by Intel, inviting them to attend interviews in Intel’s offices for various positions and further requiring them to deposit money to be eligible for the interviews.   We wish to bring to your notice that these letters are not issued by Intel or any of its authorized representatives. Hiring at Intel is based purely on merit and Intel does not ask or require candidates to deposit any money. We would urge people interested in working for Intel, to apply directly at https://jobs.intel.com/ and not fall prey to unscrupulous elements.