Posted:
3/17/2026, 6:22:05 AM
Location(s):
Center District, Israel ⋅ Petah Tikva, Center District, Israel
Experience Level(s):
Mid Level ⋅ Senior
Field(s):
IT & Security
Workplace Type:
Hybrid
Perform functional verification of IP logic to ensure design will meet specification requirements.
Develop IP verification plans, test benches, and the verification environment to ensure coverage to confirm to microarchitecture specifications.
Execute verification plans and defines and runs system simulation models to verify the design, analyze power and timing, and uncover bugs.
Replicate, root causes, and debugs issues in the presilicon environment.
Find and implement corrective measures to resolve failing tests.
Collaboration with architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features. Document test plans and drives technical reviews of plans and proofs with design and architecture teams.
Maintain and improve existing functional verification infrastructure and methodology.
Participate in the definition of verification infrastructure and related TFMs needed for functional design verification.
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.*
Website: https://www.intel.com/
Headquarter Location: Santa Clara, California, United States
Employee Count: 10001+
Year Founded: 1968
IPO Status: Public
Last Funding Type: Post-IPO Equity
Industries: Artificial Intelligence (AI) ⋅ Information Technology ⋅ Product Design ⋅ Semiconductor ⋅ Software