Application Engineer Manager: Systems Verification Group

Posted:
7/15/2024, 5:00:00 PM

Location(s):
Minas Gerais, Brazil

Experience Level(s):
Senior

Field(s):
Software Engineering

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Cadence Design Systems Inc. is looking for a motivated Application Engineer Manager to work with us in Belo Horizonte, Brazil.
Working as an Application Engineer Manager with Systems Verification Group at Cadence Design Systems Inc. is very dynamic, fast-paced and integrated with other teams all around the world.
Cadence has been nominated as a Great Place to Work globally and in Brazil and is also a Fortune 100 Best Companies to Work For.

Job Description:

  • Lead successful team of Application Engineers, architect and develop solutions for challenging problems.

  • Understand customers necessities and provide technical support in the Pre and Post-Sales process, working with the best technologies and methodologies, leading verification products to world's top Semiconductors and System companies.

  • Responsible for overseeing teams on the areas of: Simulation, verification methodologies: UVM, MDV, ABV, regressions, VManager, emulation on Palladium, prototyping with Protium, Jasper and also Xcelium.

  • Ramp up on functional verification and system validation spaces.

  • Engage team on Pre-Sales technical campaigns along with Sales and Marketing.

  • Conduct root cause analysis and provide resolution to customer technical issues.

  • Collaborate with R&D on: Simulation, Emulation, prototyping and formal areas. Helping to develop competitive and creative technical solutions.

  • Understand the competitive landscape and continuously work on differentiating Cadence’s solutions.

Requirements:

  • Complete Bachelor's degree in Electrical Engineering, Computer Science or related areas.

  • Experience leading technical team.

  • Excellent RTL understanding and coding.

  • Experience on functional verification.

  • Knowledge of Unix, C/C++.

  • A strong interest in contributing to customer success with related technical interest in EDA, HDL's, and Logic Design.

  • Excellent English written and oral communication skills

Nice to have:

  • Design fundamentals such as architecture, micro-architecture, HDLs Synthesis and timing.

  • Verification skills such as UVM testbench architecture, development and debug, SystemVerilog, SVA.

  • Fundamental SoC Architecture knowledge.

  • Embedded software development and HW/SW co-design and co-verification knowledge.

  • Some knowledge on formal verification technologies.

  • Scripting languages knowledge such as Perl, Python, TCL, Bash.

Additional Job Details:

  • Employment category: CLT.

  • Employment term: 40 hours/week.

  • Competitive benefits.

  • Hybrid work.

  • Location: Av Contorno 5800, Belo Horizonte, Minas Gerais, Brazil.

    Cadence is the only company that provides the expertise and tools, IP, and hardware required for the entire electronics design chain, from chip design to chip packaging to boards and to systems. We enable electronic systems and semiconductor companies to create innovative products that transform the way people live, work, and play. Our products are used in mobile, consumer, cloud datacenter, automotive, aerospace, IoT, industrial and other market segments. For more information, access http://www.cadence.com

    We’re doing work that matters. Help us solve what others can’t.

    Cadence Design Systems

    Website: https://www.cadence.com/

    Headquarter Location: San Jose, California, United States

    Employee Count: 5001-10000

    Year Founded: 1988

    IPO Status: Public

    Industries: Aerospace ⋅ Electronic Design Automation (EDA) ⋅ Hardware ⋅ Mobile ⋅ Semiconductor ⋅ Software