Digital IC Implementation, Principal Application Engineer

Posted:
8/4/2024, 5:00:00 PM

Location(s):
Austin, Texas, United States ⋅ California, United States ⋅ Texas, United States ⋅ San Jose, California, United States

Experience Level(s):
Expert or higher ⋅ Senior

Field(s):
Software Engineering

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

We are excited to welcome highly talented hardware designers and application engineers to join our Cadence North America Field Applications Team.
Working directly with Cadence R&D and driving customer engagements, you will enhance your in-depth knowledge in nanometer design, unlock unique expertise in digital design implementation, and level up your communication, customer, and sales skills. No matter where you are in your career, whether your next career step is to stay on the technical track, move up in management, or explore sales/marketing career opportunities, the skills and expertise you gain as an Application Engineer here at Cadence will put you miles ahead in your career advancement.
As a Digital Implementation and Signoff Field Applications Engineering (AE), you will work side-by-side with our leading edge customers. With your expertise, you'll help them deploy Cadence’s market-leading technologies in Synthesis, P&R, and Signoff to meet/exceed their PPA targets, achieve faster design closure, and turn their design concepts into reality.
Role involves:
Understand customer design requirements and methodology and drive adoption and proliferation of Cadence tools and technologies.
Guide customers on how to best utilize Cadence technologies to achieve their design goals at advanced nodes and meet project schedules
Conduct technical presentations and drive technical evaluations/benchmarks to success
Amend and augment the flow as needed using Tcl and/or other programming skills to meet objectives and improve results/flows

Minimum Requirements;

BS degree Computer Science/Engineering, Electrical, Engineering, or related field
8+ years of design/EDA experience
Strong knowledge in Digital Design Fundamentals, Semiconductor fundamentals, and Static Timing Analysis is required
Prior experience with IC digital implementation flows and backend EDA tools including Synthesis, Place and Route, IR Drop, backend design timing and power closure
Experience in scripting languages such as Tcl/Perl/Python is a must
Strong customer-facing communication and problem-solving skills
Strong personal drive for continuous learning and expanding professional skill sets

Strong verbal, written, and customer communication skills
Preferred Skills and Education
MS degree Computer Science/Engineering, Electrical, Engineering, or related field
Prior experience with IC digital implementation flows and back-end EDA tools including place and route.
Prior experience with Cadence tools such as Genus, Innovus, Conformal, Tempus is highly desired
Experience with advanced nodes 7nm and below
#LI-MA1

The annual salary range for California is $120,400 to $223,600. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.

We’re doing work that matters. Help us solve what others can’t.

Cadence Design Systems

Website: https://www.cadence.com/

Headquarter Location: San Jose, California, United States

Employee Count: 5001-10000

Year Founded: 1988

IPO Status: Public

Industries: Aerospace ⋅ Electronic Design Automation (EDA) ⋅ Hardware ⋅ Mobile ⋅ Semiconductor ⋅ Software