Posted:
9/4/2024, 10:14:14 PM
Location(s):
Bengaluru, Karnataka, India ⋅ Karnataka, India
Experience Level(s):
Junior ⋅ Mid Level ⋅ Senior
Field(s):
Software Engineering
Responsible for RTL design of PHY blocks and drive design quality process of Lint, CDC and timing reviews .
- Support functional verification and guide code and functional coverage.
- Support and guide Firmware development and Silicon validation.
- Support and address customer tickets.
Website: https://www.cadence.com/
Headquarter Location: San Jose, California, United States
Employee Count: 5001-10000
Year Founded: 1988
IPO Status: Public
Industries: Aerospace ⋅ Electronic Design Automation (EDA) ⋅ Hardware ⋅ Mobile ⋅ Semiconductor ⋅ Software