Sr Principal Application Engineer

Posted:
3/20/2024, 5:00:00 PM

Location(s):
Zhubei City, Taiwan

Experience Level(s):
Expert or higher ⋅ Senior

Field(s):
Software Engineering

Workplace Type:
Remote

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Cadence-Tensilica is the leading DSP/Processor IP technology in the fast-growing IC design industry, also well-known for its customizable Xtensa configurable microprocessor core. It is widely used in a variety of market segments today, such as Mobile, Home Entertainment, Communication, IoT, AI and Imaging in chip designs. With more than 300 customers world-wide, we work as one team to provide design support, advise and execution of complex technical/business needs, along with our passion and agility in attitude.

In this position, you will do:

  • Collaborate with Business, Engineering, and other internal teams to provide customers the best practices of design along with our IP technology.
  • Work with remote and multi-site teams for hands-on technical support and competition benchmarking.
  • Be expected to deep dive into the technical details in different aspects centered with Processor/DSP technology.
  • Assist product marketing and engineering support team in pre and post sales situations.

Basic Qualifications

  • Master’s degree in Computer Science/Electrical Engineering, or related technical discipline.
  • 10+ years’ experience in Digital SoC Design, or Embedded Software Engineering from board to system level.
  • Knowledge of computer architecture concepts (memory, microprocessors/controllers, well known CPU architectures, and DSP) is a must.
  • As well understanding on one of AI, communication, Multiple-media segments, and have domain technology.
  • Expert-level programming skills in C/C++ and Python.
  • Fluent in English.

The following Qualifications are a Plus:

  • Extensive knowledge in SoC Integration and Design.
  • Comprehensive knowledge in embedded software tooling usage (compiler, linker, profiler, debugger).
  • Experienced SoC architecture design with DSP, CPU architecture.
  • Knowledge of Tensilica processor technology, and was have experienced to use

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