Product Development Engineer

Posted:
12/24/2024, 10:02:13 PM

Location(s):
Shanghai, Shanghai, China ⋅ Shanghai, China

Experience Level(s):
Junior ⋅ Mid Level ⋅ Senior

Field(s):
Product

Workplace Type:
On-site

Job Details:

Job Description: 

Drives and develops testability and manufacturability of integrated circuits from the component feasibility stage through production ramp. Contributes to design, development, and validation of testability circuits, test flows, and methodologies for new products through evaluation, development, and debug of complex test methods. Interfaces with process development, fab, factory, assembly, quality and reliability, and manufacturing groups to enable postsilicon HVM ramp. Evaluates new designs on automatic test equipment (ATE) and works with the design, DFx, and product development teams to debug functionality and performance issues to root cause. Performs ATE device characterization, utilizes that data to define datasheet specifications and performs yield analysis. Collaborates with designers to drive design for test/debug/manufacturing (DFT/DFD/DFM) features enabling efficient production testing of new products. Develops and debugs complex software programs to convert design validation vectors and drive complex test equipment. Creates and tests validation and production test hardware solutions. Tests, validates, modifies, and redesigns circuits to guarantee component margin to specification. Analyzes and evaluates component specification versus performance to ensure optimal match of component requirements with production equipment capability with specific emphasis on yield analysis and bin split capability. Ensures manufacturability over process and product design through thorough analysis of process and spec corners and works with design to resolve yield issues before manufacturing ramp. Drives test time reduction through analysis of fallout data versus test time for various IPs to balance and drive overall product cost optimizations. Analyzes early customer returns with emphasis on driving test hole closure activities. Creates and applies concepts for optimizing component production relative to both quality and cost constraints. Leads and drives manufacturing readiness from fab, assembly, and test factory to support engineering sample and customer sample generation (ES milestones), wafer start planning, product qual execution strategy and capacity analysis, and assembly and test site certification activities. Works with fab, assembly, and test factory partners and planners to support production ramp. May also manage execution of new product introductions in the fab, fab process targeting, product/process optimizations, and participate in factory task forces to bring product perspective and respond to product issues. Optimizes product supply through data analysis of postsilicon binsplit, die level cherry pick (DLCP), and optimize sort/test content and yield downstream through data analysis.

Qualifications:

Responsibilities: In this position, you will be responsible for Intel products (Server/SOC/ASIC) test development. Your responsibilities will include but not be limited to: - Collaborating with design and product development engineers to deliver Design-for-Test (DFT) solutions. - Participating in DFT development like DFT architecture definition and test plans definition. - Responsible for Verilog and/or VHDL test bench creation and/or debug, test writing, Register Transfer Level (RTL) simulation, Gate Level Simulation (GLS), analog simulation, performance validation, VTPSim (Verilog test pattern simulator), silicon debug on tester (or on other platform like system level). - Developing highly optimized test vectors by using state-of-the-art vector conversion tool and methods. - Developing, integrating, and optimizing test program through characterization and other techniques. - Developing or designing test hardware (for example test interface unit/load board).- Managing silicon debug to check out all the structural and functional tests. - Qualifying new products and performing detailed test program analysis to ensure product startup with low Defect per Million (DPM), low test time, good yield and meeting other product health indicators before passing over to factory product engineering group for high volume manufacturing. Qualifications: - Master in Electrical, Electronics, Microelectronics or Computer Engineering; - Good written and spoken English. - Familiar with Digital Circuits and Analog Electronic Circuits. - Good software skills in programming (C, C#, Python, or PERL etc.)

          

Job Type:

College Grad

Shift:

Shift 1 (China)

Primary Location: 

PRC, Shanghai

Additional Locations:

Business group:

Manufacturing and Product Engineering (MPE) is responsible for test development across product segments, supporting 95% of Intel's revenue. We deliver comprehensive pre-production test suites and component/physical debug capabilities to enable high quality, high volume manufacturing.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

Intel

Website: https://www.intel.com/

Headquarter Location: Santa Clara, California, United States

Employee Count: 10001+

Year Founded: 1968

IPO Status: Public

Last Funding Type: Post-IPO Equity

Industries: Artificial Intelligence (AI) ⋅ Information Technology ⋅ Product Design ⋅ Semiconductor ⋅ Software