Posted:
12/16/2024, 4:55:46 PM
Location(s):
Karnataka, India
Experience Level(s):
Mid Level ⋅ Senior
Field(s):
IT & Security
Workplace Type:
Hybrid
In this position you will be working as part of a RTL design Team delivering soft IPs to next generation Server, Client SOC
Looking for Digital Design experience of around 8 to 12 years.
Knowledge of protocols PCIE/AXI/AHB/APB with strong RTL coding experience required.
Experience in tool runs to closure like CDC, RDC.
LINT, Synthesis and timing closure, LEC and Formal property-based verification for front end quality checks.
Understand SoC architecture and IP requirements.
Bachelors' or Masters' degree in EE or similar, with 8-12 years of relevant experience.
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.Website: https://www.intel.com/
Headquarter Location: Santa Clara, California, United States
Employee Count: 10001+
Year Founded: 1968
IPO Status: Public
Last Funding Type: Post-IPO Equity
Industries: Artificial Intelligence (AI) ⋅ Information Technology ⋅ Product Design ⋅ Semiconductor ⋅ Software