Posted:
4/23/2026, 5:44:47 AM
Location(s):
California, United States ⋅ San Jose, California, United States
Experience Level(s):
Internship
Field(s):
Software Engineering
Workplace Type:
On-site
Responsible for designing, developing, troubleshooting and debugging PCB/package/chip thermal analysis software.
Works on extremely complex problems where analysis of situations or data requires an evaluation of intangible variance factors.
Position Requirements:
The candidate should be attending a BS, MS or PhD program in ME/EE/CS, have strong programming skills in C++, and deep familiarity with object-oriented programming methods.
Prior knowledge and experience with distributed/multi-threaded programming, numerical analysis techniques, meshing techniques, finite-element based thermal simulation, CFD analysis, and in-depth understanding of electric cooling of PCB/package/chip preferred.
Experience on automatic design optimization for thermal targets is a plus.
Website: https://www.cadence.com/
Headquarter Location: San Jose, California, United States
Employee Count: 5001-10000
Year Founded: 1988
IPO Status: Public
Industries: Aerospace ⋅ Electronic Design Automation (EDA) ⋅ Hardware ⋅ Mobile ⋅ Semiconductor ⋅ Software
Visa Sponsorship: Sponsors work visas